Apparatus and method for designing semiconductor integrated circuit, and computer readable medium

A method for designing a semiconductor integrated circuit, the method comprising:

• determining at least one transmitting register and at least one receiving register in an interface to be synchronized with circuit description data of the semiconductor integrated circuit, clock domain information of the semiconductor integrated circuit, and unsynchronized point information indicating at least one unsynchronized point in the semiconductor integrated circuit;
• extracting interface circuit information associated with the connection between the transmitting registers and the receiving registers;
• determining a number of supply sources equal to a number of the transmitting registers serving as data supply sources, for each receiving register from the interface circuit information;
• selecting at least one insertion point candidate configured to couple to a synchronization circuit based on the number of supply sources;
• generating insertion point candidate information indicating the insertion point candidate;
• determining a number of output destinations equal to a number of the receiving registers serving as data output destinations, for each transmitting register;
• selecting at least one insertion point configured to couple to the synchronization circuit, based on the number of output destinations and the insertion point candidate information;
• generating insertion point information indicating the insertion point;
• inserting the synchronization circuit in the insertion point based on the insertion point information and circuit description data of the synchronization circuit;
• and
• generating synchronized circuit description data of the semiconductor integrated circuit comprising the synchronization circuit coupled with the insertion point.

A computer readable medium having stored thereon a computer program for designing a semiconductor integrated circuit, that when executed by the computer, causes the computer to:

• determine at least one transmitting register and at least one receiving register in an interface to be synchronized, with circuit description data of the semiconductor integrated circuit, clock domain information of the semiconductor integrated circuit, and unsynchronized point information indicating at least one unsynchronized point in the semiconductor integrated circuit;
• extract interface circuit information associated with the connection between the transmitting registers and the receiving registers;
• determine a number of supply sources equal to a number of the transmitting registers serving as data supply sources, for each receiving register from the interface circuit information;
• select at least one insertion point candidate configured to couple to a synchronization circuit based on the number of supply sources;
• generate insertion point candidate information indicating the insertion point candidate;
• determine a number of output destinations equal to of a number of the receiving registers serving as data output destinations, for each transmitting register;
• select at least one insertion point configured to couple to the synchronization circuit, based on the number of output destinations and the insertion point candidate information;
• generate insertion point information indicating the insertion point;
• insert the synchronization circuit in the insertion point based on the insertion point information and circuit description data of the synchronization circuit;
• and
• generate synchronized circuit description data of the semiconductor integrated circuit comprising the synchronization circuit coupled with the insertion point.