Semiconductor memory device, manufacturing method thereof, data processing system, and data processing device

A semiconductor memory device comprising:

• a pn-junction diode having first and second impurity diffusion layers that are apart of a semiconductor substrate, one of the first and second impurity diffusion layers functions as an anode of the pn-junction diode, other of the first and second impurity diffusion layers functions as a cathode of the pn-junction diode;
• a memory element electrically connected to the first impurity diffusion layer;
• and
• a cylindrical insulation film provided on the second impurity diffusion layer, wherein
• at least a part of the first impurity diffusion layer and at least apart of the memory element are formed in a region surrounded by the cylindrical insulation film.

A semiconductor memory device comprising:

• a plurality of first impurity diffusion layers arranged in a matrix in first and second directions;
• a plurality of second impurity diffusion layers in a line shape extending to the second direction, each of the second impurity diffusion layers being provided at a lower part of the first impurity diffusion layers arranged in the second direction so as to form pn-junctions;
• a plurality of memory elements arranged in a matrix in the first and second directions, and provided at an upper part of the first impurity diffusion layers, each of the memory elements being electrically connected to a corresponding one of the first impurity diffusion layers;
• and
• a plurality of bit lines in a line shape extending to the first direction, and electrically connected in common to the memory elements arranged in the first direction, wherein
• the first and second impurity diffusion layers are a part of a semiconductor substrate, and
• each of the memory elements is formed in a self-aligned manner with respect to a corresponding one of the first impurity diffusion layers.

A manufacturing method of a semiconductor memory device, comprising:

• forming a diode having a pn-junction by forming a first impurity diffusion layer in a semiconductor substrate and forming a second impurity diffusion layer at a lower part of the first impurity diffusion layer, thereby the first and second impurity diffusion layers are arranged in a direction perpendicular to a main surface of the semiconductor substrate;
• patterning the first impurity diffusion layer using a hard mask to form a silicon pillar;
• forming a sidewall insulation film on a side surface of the silicon pillar and the hard mask;
• removing the hard mask to form a cavity in a region surrounded by the sidewall insulation film;
• and
• forming at least a part of the memory element in the cavity.

A data processing system comprising:

• a semiconductor memory device;
• a data processor;
• and
• a system bus that connects the semiconductor memory device and the data processor to each other,
• wherein a memory cell included in the semiconductor memory device comprises:
• a silicon pillar that projects to a perpendicular direction that is substantially perpendicular to a main surface of a semiconductor substrate;
• a diode having first and second impurity diffusion layers which form pn-junction, the first and second impurity diffusion layers being arranged in the perpendicular direction, at least one of the first and second impurity diffusion layers being provided in the silicon pillar;
• a cylindrical insulation film that surrounds a side surface of the silicon pillar and projects to the perpendicular direction, a top end of the cylindrical insulation film is higher than that of the silicon pillar;
• and
• a memory element electrically connected to the first impurity diffusion layer in a surrounded region that is surrounded by the cylindrical insulation film.

A semiconductor memory device comprising:

• a data rewritable user area;
• and
• a defective-address storing circuit that stores a defective address included in the user area,
• wherein a memory cell included in the defective-address storing circuit comprises:
• a silicon pillar that projects to a perpendicular direction that is substantially perpendicular to a main surface of a semiconductor substrate;
• a diode having first and second impurity diffusion layers which form pn-junction, the first and second impurity diffusion layers being arranged in the perpendicular direction, at least one of the first and second impurity diffusion layers being provided in the silicon pillar;
• a cylindrical insulation film that surrounds a side surface of the silicon pillar and projects to the perpendicular direction, a top end of the cylindrical insulation film is higher than that of the silicon pillar;
• and
• a memory element electrically connected to the first impurity diffusion layer in a surrounded region that is surrounded by the cylindrical insulation film.

A data processing device comprising:

• a program area;
• and
• a data processing circuit that performs a predetermined operation in accordance with a program stored in the program area,
• wherein a memory cell included in the program area comprises:
• a silicon pillar that projects to a perpendicular direction that is substantially perpendicular to a main surface of a semiconductor substrate;
• a diode having first and second impurity diffusion layers which form pn-junction, the first and second impurity diffusion layers being arranged in the perpendicular direction, at least one of the first and second impurity diffusion layers being provided in the silicon pillar;
• a cylindrical insulation film that surrounds a side surface of the silicon pillar and projects to the perpendicular direction, a top end of the cylindrical insulation film is higher than that of the silicon pillar;
• and
• a memory element electrically connected to the first impurity diffusion layer in a surrounded region that is surrounded by the cylindrical insulation film.