Gradient Ternary or Quaternary Multiple-Gate Transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Hsin Ko, Clement Hsingjen Wann
Life of this patent
Estimating the term…
Abstract
An integrated circuit structure includes a semiconductor substrate; insulation regions over the semiconductor substrate; and an epitaxy region over the semiconductor substrate and having at least a portion in a space between the insulation regions. The epitaxy region includes a III-V compound semiconductor material. The epitaxy region also includes a lower portion and an upper portion over the lower portion. The lower portion and the semiconductor substrate have a first lattice mismatch. The upper portion and the semiconductor substrate have a second lattice mismatch different from the first lattice mismatch.
Claims17
An integrated circuit structure comprising:
- a semiconductor substrate;
- insulation regions over the semiconductor substrate;
- and
- an epitaxy region over the semiconductor substrate and having at least a portion in a space between the insulation regions, wherein the epitaxy region comprises a first III-V compound semiconductor material, and wherein the epitaxy region further comprises:
- a lower portion, wherein the lower portion and the semiconductor substrate have a first lattice mismatch;
- and
- an upper portion over the lower portion, wherein the upper portion and the semiconductor substrate have a second lattice mismatch different from the first lattice mismatch.
An integrated circuit structure comprising:
- a semiconductor substrate having a first lattice constant;
- insulation regions on the semiconductor substrate and having sidewalls facing each other;
- an epitaxy region comprising a III-V compound semiconductor material over the semiconductor substrate, the epitaxy regions having sidewalls adjoining the sidewalls of the insulation regions, wherein the epitaxy region further comprises:
- a fin above top surfaces of the insulation regions and having a second lattice constant different from the first lattice constant;
- and
- a gradient epitaxy region between and contacting the fin and the semiconductor substrate, wherein the gradient epitaxy region has a third lattice constant between the first lattice constant and the second lattice constant, and wherein sidewalls of the fin are substantially vertically aligned to sidewalls of the gradient epitaxy region;
- and
- a high-bandgap semiconductor layer on a top surface and the sidewalls of the fin, wherein the high-bandgap semiconductor layer has a bandgap greater than a bandgap of the fin.
Dependencies are inferred from the claim text.