Semiconductor integrated circuit, circuit function veryfication device and method of veryfying circuit function

A circuit function verification device comprising:

• a data generation circuit configured to generate first data used for function verification of a built-in self test circuit and a built-in redundancy allocation circuit of a memory having a redundancy part;
• a failure data generation circuit configured to generate second data for conducting a built in self test by inverting at least one bit of the first data based on a failure injection indication signal;
• a timing circuit configured to adjust timing of at least one of the first and the second data in order to use one of the first and the second data as writing data to the memory and to use the other as an output expected value compared with data read out from the memory;
• a comparison circuit configured to read out data written in the memory to compare the read-out data with the output expected value;
• and
• a pass/fail determination circuit configured to determine whether at least one failure bit is present in the memory based on a comparison result of the comparison circuit.

A method of verifying circuit function comprising:

• generating first data used for function verification of a built-in self test circuit and a built-in redundancy allocation circuit of a memory having a redundancy part;
• generating second data for conducting a built in self test by inverting at least one bit of the first data based on a failure injection indication signal by a failure data generation circuit;
• adjusting timing of at least one of the first and the second data in order to use one of the first and the second data as writing data to the memory and to use the other as an output expected value compared with data read out from the memory;
• reading out data written in the memory to compare the read-out data with the output expected value;
• and
• determining whether at least one failure bit is present in the memory based on a comparison result.