Method of forming an eeprom device and structure therefor

An EEPROM cell comprising:

• a semiconductor substrate having a channel region of a first transistor formed thereon;
• a floating gate having a bit storage section, and also having a gate electrode overlying a portion of the channel region, the bit storage section having an outer edge;
• a control gate overlying the floating gate, the control gate having an outer edge that extends a first distance past the outer edge of the bit storage section of the floating gate;
• a metal layer overlying a first portion of the control gate and extending to overlap the first portion of the control gate by a second distance beyond the outer edge of the control gate;
• and
• an opening through the metal layer, the opening overlying the bit storage section wherein an outer edge of the opening is spaced a third distance past the outer edge of the bit storage section and wherein the opening overlies a second portion of the control gate.