Aluminum-nickel alloy wiring material, device for a thin film transistor and a thin film transistor substrate using the same, and method of manufacturing the thin film transistor substrate

A thin film transistor comprising:

• a first wiring circuit layer;
• a semiconductor layer disposed on the first wiring circuit layer;
• a second wiring circuit layer disposed on the semiconductor layer;
• and
• a transparent electrode layer disposed on the semiconductor layer,
• wherein at least one of said first and second wiring circuit layers comprises Aluminum, Nickel, Cerium, and Boron and wherein at least a portion of the second wiring circuit layer contacts the transparent electrode layer.

A thin film transistor substrate comprising:

• a substrate;
• a third wiring circuit layer disposed on the substrate and comprising a gate electrode;
• a gate insulating layer disposed on the substrate;
• a semiconductor layer disposed on the gate insulating layer;
• a fourth wiring circuit layer disposed on the semiconductor layer and comprising a source electrode and a drain electrode;
• an insulating layer disposed on the source electrode and the drain electrode and comprising a contact hole corresponding to a portion of the source electrode;
• and
• a transparent electrode disposed on the insulating layer and electrically connected with the source electrode through the contact hole,
• wherein at least one of said third and fourth wiring circuit layers comprise Aluminum, Nickel, Cerium and Boron.

A sputtering target comprising:

• Aluminum, Nickel, Cerium and Boron,
• wherein the Nickel, Cerium and Boron satisfy following inequalities:
• 0.5≦X≦5.0;
• 0.01≦Y≦1.0;
• and
• 0.01≦Z≦1.0, respectively,
• wherein X represents an atomic percentage of Nickel content, Y represents an atomic percentage of Cerium content, and Z represents an atomic percentage of Boron content.

A method of manufacturing a thin film transistor substrate, the method comprising:

• disposing a thin film transistor on a substrate, the thin film transistor comprising:
• a fifth wiring circuit layer disposed on the substrate;
• a semiconductor layer disposed on the wiring circuit layer;
• and
• a sixth wiring circuit layer disposed on the semiconductor layer;
• coating a photoresist on the substrate;
• removing a portion of the photoresist;
• etching an insulating layer using the photoresist as a mask to expose a portion of the sixth wiring circuit layer through a contact hole;
• ashing the substrate;
• stripping the photoresist;
• cleaning the substrate with an cleaning solution;
• and
• disposing a transparent electrode on the insulating layer such that the transparent electrode is connected to the sixth wiring circuit layer through the contact hole,
• wherein at least one of said fifth and sixth wiring circuit layers comprises Aluminum, Nickel, Cerium, and Boron, and
• wherein the Nickel, Cerium and Boron satisfy the following inequalities:
• 0.5≦X≦5.0;
• 0.01≦Y≦1.0;
• and
• 0.01≦Z≦1.0, respectively,
• wherein X represents an atomic percentage of Nickel content, Y represents an atomic percentage of Cerium content and Z represents an atomic percentage of Boron content.