Method for designing a high performance asic (application-specific integrated circuit) accelerator

A method of making a digital signal processing (DSP) accelerator comprising:

• defining a software programmable pre-laid out macro by laying out a control logic with a fixed topology to obtain pre-laid out control logic;
• and
• defining a hardware programmable pre-laid out macro by customizing a configurable layout area and mapping a computational logic based on computation kernels for use by an application to obtain pre-laid out computational logic.

A digital signal processing (DSP) accelerator comprising:

• a software programmable pre-laid out control logic;
• and
• a hardware programmable pre-laid out computational logic based on computation kernels for use by an application.