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AssigneeLSI Corporation
InventorsMark F. Turner, Jeff S. Brown, Joseph Simko, Miguel A. Vilchis
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Method of analyzing noise sensitivity of integrated circuits having at least one memory storage device and a noise sensitivity analyzer. In one embodiment, the noise sensitivity analyzer includes: (1) a circuit reservoir configured to receive and store a model of a circuit having at least one memory storage device to be analyzed, (2) a circuit parser configured to identify nodes of the model and (3) a circuit evaluator configured to apply a large test current to each of the nodes for multiple circuit states of the at least one memory storage device and determine which of the nodes are sensitive nodes.
A noise sensitivity analyzer, comprising:
A method of analyzing a circuit for noise sensitivity, comprising:
A method of determining a critical charge of a node of a memory storage device, comprising:
Dependencies are inferred from the claim text.