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US 2010/0169690 A1Published application
System power management using memory throttle signal
AssigneeIntel Corporation
InventorsGopal Mundada, Xiuting (Kaleen) Man, Brian Griffith, Viktor D. Vogman, Richard Kaltenbach
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Abstract
According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.
Claims15
A method, comprising:
- monitoring power information associated with a computing system;
- and
- based on the monitored power information, determining whether a hardware memory throttling signal will be asserted.
A system, comprising:
- a memory throttling pin input associated with a memory element;
- and
- a power manager coupled to the memory throttling pin and adapted to:
- (i) monitor power information associated with a computing system, and (ii) based on the monitored power information, determine whether a signal will be asserted on the memory throttling pin.
1 more element
Dependencies are inferred from the claim text.