Controlling non-redundant execution in a redundant multithreading (RMT) processor

A system comprising:

• a multi-core processor including at least a first core and a second core, wherein the first core includes at least one execution unit and retirement logic to retire executed instructions of a first thread and a second redundant thread, the first core to, responsive to a first instruction, perform non-redundant execution of instructions in one of the first thread and the second redundant thread until receipt of a second instruction to terminate the non-redundant execution, synchronize a state of the first thread and the second redundant thread, and perform continued redundant execution of instructions in the first thread and the second redundant thread;
• and
• a dynamic random access memory (DRAM) coupled to the multi-core processor.