US 2010/0169610 A1 · PROCESSOR

Abstract

The processor according to the present invention is a processor having a forwarding function and includes an attribute information holding unit that holds attribute information regarding inhibition of writing to a register and a register write inhibition circuit that holds, when forwarding is performed, the writing of the data forwarded according to attribute information. The attribute information holding unit holds the attribute information by relating the attribute information to at least one register. Alternatively, the attribute information holding unit is a part of plural pipeline buffers and passes the attribute information along with the data to be forwarded, to a pipeline buffer in a subsequent stage.

Claims11

Dependent claims

A processor having a forwarding function, comprising:

a holding unit configured to hold attribute information regarding inhibition of writing to a register;
and
a control unit configured to inhibit, when data is forwarded, writing of the forwarded data to the register, according to the attribute information.

Dependencies are inferred from the claim text.

Facts

Application

12/161,124Filed 16 Oct 2006

Priority

JP 2006-01302920 Jan 2006

Published

1 Jul 2010

Term ends

Not estimatedThe source records don’t support an estimate.

Classification4 codes

G06F 9/3869
Using instruction pipelines: implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
G06F 9/3826
Operand accessing: bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
G06F 9/3832
Operand prefetching: value prediction for operands; operand history buffers
G06F
Computing and data processing

Processor

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Processor

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Abstract

Claims11