Processor and method for using an instruction hint to prevent hardware prefetch from using certain memory accesses in prefetch calculations
AssigneeAdvanced Micro Devices, Inc.
InventorThomas M. Deneau
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorThomas M. Deneau
Estimating the term…
A microprocessor includes a cache memory, a prefetch unit, and detection logic. The prefetch unit may be configured to monitor memory accesses that miss in the cache and to determine whether to prefetch one or more blocks of memory from a system memory based upon previous memory accesses. The prefetch unit may be further configured to use addresses of the memory accesses that miss to calculate each next memory block to prefetch. The detection logic may be configured to provide a notification to the prefetch unit in response to detecting a memory access instruction including a particular hint. In response to receiving the notification, the prefetch unit may be configured to inhibit using an address associated with the memory access instruction including the particular hint, when calculating subsequent memory blocks to prefetch.
A microprocessor comprising:
A method comprising:
A computer system comprising:
Dependencies are inferred from the claim text.