Back to results
US 2010/0169604 A1Published application
Hybrid memory device
AssigneeIntel Corporation
InventorsSanjeev N. Trika, Robert Royer
Life of this patent
Estimating the term…
Abstract
A method is provided. The method includes receiving data and classifying received data in one of several tiers of data. The method also includes storing each tier of data on a different non-volatile memory device.
Claims30
A method, comprising:
- receiving data;
- classifying received data in one of several tiers of data;
- storing each tier of data on a different non-volatile memory device.
A system, comprising:
- a first non-volatile memory device;
- a second non-volatile memory device;
- and
- a memory controller coupled to the first and second non-volatile memory devices, wherein the memory controller is to split data between the first and second non-volatile memory devices.
1 more element
A semiconductor device;
- comprising:
- a processor;
- a single-level cell (SLC) NAND flash memory device coupled to the processor;
- and
- a multi-level cell (MLC) NAND flash memory device coupled to the processor, wherein at least one of cache workload and a solid state drive workload is split between the single-level cell and multi-level cell NAND flash memory devices.
2 more elements
A method, comprising:
- splitting a workload data into tier 1 data and tier 2 data;
- and
- transferring the tier 1 and tier 2 data to first and second non-volatile memory devices respectively, wherein an access time of the first non-volatile memory device is relatively lower than an access time of the second non-volatile memory device.
Dependencies are inferred from the claim text.