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US 2010/0169518 A1Published application
Semiconductor memory device
OwnerHyong-Yong Lee, Bu-Jin Kiminventors
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OwnerHyong-Yong Lee, Bu-Jin Kiminventors
Estimating the term…
A semiconductor memory device includes a plurality of output buffer units connected to a plurality of terminals. Each of the output buffer units includes a first high speed data output (HSDO) buffer adapted to buffer even-numbered data of a corresponding data row among a plurality of data rows and to output the even-numbered data to a corresponding terminal among the plurality of terminals, a second HSDO buffer adapted to buffer odd-numbered data of the corresponding data row and to output the odd-numbered data to the corresponding terminal, and a buffer selector adapted to select and activate the first HSDO buffer and/or the second HSDO buffer in response to a corresponding control signal out of at least one control signal during a HSDO test.
A semiconductor memory device coupled to a plurality of terminals, the semiconductor memory device, comprising:
A semiconductor memory device including a memory cell array having a plurality of memory cells arranged along a plurality of rows, the semiconductor memory device being coupled to a plurality of terminals, the semiconductor memory device comprising:
A method of testing a semiconductor memory device coupled to a plurality of terminals, the semiconductor memory device including a memory cell array including a plurality of memory cells arranged along a plurality of rows a plurality of output buffer units respectively connected to the plurality of terminals, the method comprising:
Dependencies are inferred from the claim text.