US 2010/0169402 A1Published application

Fast fourier transform processor

AssigneeIndustrial Technology Research Institute

InventorsHung-Lin Chen, Yu-Min Lin, Dar-Zu Hsu, Yuan Chen, Chen-Yi Lee

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Abstract

An FFT processor is disclosed, which includes a first multi-pipelined MDC unit, a second multi-pipelined MDC unit and a switching network. The first multi-pipelined MDC unit and the second multi-pipelined MDC unit respectively employ a plurality of MDC circuits to change the positions of the delayers thereof in parallel way. By changing the operation time sequence of the signals in the first multi-pipelined MDC unit and the second multi-pipelined MDC unit, the first multi-pipelined MDC unit is able to directly send the operation results to the second multi-pipelined MDC unit through the switching network.

Claims14

Dependent claims

A Fast Fourier Transform (FFT) processor, comprising:

a first multi-pipelined multipath delay commutator (MDC) unit, for performing M radix-2N first butterfly operations in parallel way so as to output a plurality of first operation results, wherein M and N are integers greater than 1;
a switching network, coupled to the first multi-pipelined MDC unit for changing the relative positions of the first operation results;
and
a second multi-pipelined MDC unit, coupled to the switching network for using the first operation results after changing the relative positions thereof to perform M radix-2N second butterfly operations in parallel way so as to output a plurality of second operation results.

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Dependencies are inferred from the claim text.