Method for manufacturing semiconductor

Abstract

A method for manufacturing a semiconductor includes forming an active region for an ESD device, an active region for a first polygate and the semiconductor, and a second polygate having a form of a blanket trench on a substrate, forming an interlayer dielectric layer including first and second insulating on the substrate, planarizing the interlayer dielectric layer, forming a contact pattern to open a portion of the interlayer dielectric layer over the first polygate, forming a first polygate trench by performing a first etch process with respect to the second insulating layer below the contact pattern, and performing a second etch process to remove the first insulating layer inside the first polygate trench and to remove the first insulating layer over the active region of the semiconductor other than the second polygate.

Dependencies are inferred from the claim text.