Method of high aspect ratio plug fill

A method comprising:

• forming a silicide layer on semiconductor containing layer;
• after forming the silicide layer, forming a dielectric layer on the silicide layer;
• forming a via in the dielectric layer, a height of the via being at least 10 times a width of the via, the via extending to the silicide layer such that a bottom surface of the via is a portion of the silicide layer, the portion of the silicide layer acting as a nucleation layer on only the bottom surface of the via and not on sidewalls of the via;
• and
• depositing conductive fill material on the portion of the silicide layer up to a top of the via to create a seamless plug fill, the conductive fill material being deposited from the bottom up and not inward from the sidewalls.

A method comprising:

• forming a dielectric layer on a semiconductor containing layer;
• forming a via in the dielectric layer, the via extending to the semiconductor containing layer such that a bottom surface of the via is a portion of the semiconductor containing layer, wherein a height of the via is at least 10 times a width of the via;
• after forming the via implanting ions into the portion of the semiconductor containing layer to form a nucleation layer in the bottom surface of the via, wherein the via has no other nucleation layer or conductive adhesive on its sidewalls or top corners;
• depositing conductive fill material in the via such that the conductive fill material grows upwards from the nucleation layer to a top of the via and not inwards from sidewalls or top corners of the via, creating a voidless and seamless plug fill.