Semiconductor Processing Methods

A semiconductor processing method, comprising:

• utilizing plasma-enhanced atomic layer deposition to simultaneously deposit a composition across both a front side exposed surface and a back side exposed surface of a semiconductor substrate;
• the composition on the front side exposed surface being a first layer of the composition, and the composition across the back side exposed surface being a second layer of the composition;
• forming a layer of insulative material over the first layer of the composition;
• etching a pattern of openings extending through the layer of insulative material and through the first layer of the composition;
• and
• forming conductive material within the openings.

A semiconductor processing method, comprising:

• forming a monocrystalline silicon-containing semiconductor substrate to comprise one or more electrically conductive layers across a front side of the substrate, and to comprise one or more passivation layers over the one or more electrically conductive layers;
• the semiconductor substrate comprising a back side in opposing relation to the front side;
• the back side having an exposed surface, and the front side having an exposed surface comprising a surface of a passivation layer;
• utilizing plasma-enhanced atomic layer deposition to simultaneously deposit a composition across the front side exposed surface and across the back side exposed surface;
• the composition on the front side exposed surface being a first layer of the composition, and the composition across the back side exposed surface being a second layer of the composition;
• forming a layer of insulative material over the first layer of the composition;
• etching a pattern of openings extending through the layer of insulative material, through the first layer of the composition and through the one or more passivation layers to expose regions of the one or more electrically conductive layers;
• and
• dipping the substrate in a plating bath to form conductive material within the openings.

A semiconductor processing method, comprising:

• forming a monocrystalline silicon-containing semiconductor substrate to comprise at least one bond pad supporting layer along a front side of the substrate, and to comprise a silicon nitride passivation layer over the at least one bond pad supporting layer;
• the semiconductor substrate comprising a back side in opposing relation to the front side;
• the back side having an exposed surface, and the front side having an exposed surface comprising a surface of the silicon nitride passivation layer;
• utilizing plasma-enhanced atomic layer deposition to simultaneously deposit insulative material across the front side exposed surface and across the back side exposed surface;
• the plasma-enhanced atomic layer deposition being conducted at a temperature of from at least about 300° C. to less than or equal to about 500° C. to activate hydrogen in the silicon nitride passivation layer during the deposition;
• etching a pattern of openings extending through the insulative material and through the silicon nitride passivation layer to expose regions of the at least one bond pad supporting layer;
• and
• dipping the substrate in a plating bath to form conductive material within the openings, the conductive material within the openings being contacts to the semiconductor substrate front side.

A semiconductor processing method, comprising:

• forming a monocrystalline silicon-containing semiconductor substrate to comprise one or more levels of integrated circuitry over a front side of a semiconductor substrate, and to comprise one or more bond pad supporting layers over the integrated circuitry;
• the semiconductor substrate comprising a back side in opposing relation to the front side of the semiconductor substrate;
• the back side having an exposed surface;
• forming a passivation oxide over the one or more bond pad supporting layers;
• forming a passivation nitride over the passivation oxide;
• utilizing plasma-enhanced atomic layer deposition to simultaneously deposit a composition across a surface of the passivation nitride and across the back side surface;
• the composition deposited across the front side surface being a first layer of the composition, and the composition deposited across the back side surface being a second layer of the composition;
• the plasma-enhanced atomic layer deposition being conducted at a temperature less than or equal to about 500° C. but high enough to thermally treat the passivation nitride to cause hydrogen migration from the passivation nitride, and;
• forming a polyimide-containing layer over the first layer of the composition;
• etching a pattern of openings extending through the polyimide-containing layer, through the first layer of the composition and through the passivation nitride to expose regions of the one or more bond pad supporting layers;
• and
• dipping the substrate in a plating bath to form conductive material within the openings, the conductive material within the openings being contacts to the one or more bond pad supporting layers.