Resist feature and removable spacer pitch doubling patterning method for pillar structures

A method of making a pillar shaped nonvolatile memory device array, comprising:

• forming a plurality of bottom electrodes over a substrate;
• forming at least one device layer comprising at least one steering element layer and at least one storage element layer over the plurality of bottom electrodes;
• forming a hard mask stack over the at least one device layer;
• forming a plurality of photoresist spaced apart features over the hard mask stack;
• forming sidewall spacers on the plurality of photoresist spaced apart features;
• forming a plurality of photoresist filler features between the plurality of photoresist spaced apart features such that upper portions of the sidewall spacers are exposed and such that the plurality of photoresist filler features are located between the sidewall spacers;
• selectively removing the sidewall spacers to leave the plurality of photoresist spaced apart features and the plurality of photoresist filler features spaced apart from each other;
• etching at least a portion of the hard mask stack using the plurality of photoresist spaced apart features and the plurality of photoresist filler features as a mask to form a plurality of hard mask features;
• etching the at least one device layer using the plurality of hard mask features as a mask, to form a plurality of pillar shaped nonvolatile memory cells each comprising a diode steering element and a resistivity switching storage element;
• and
• forming a plurality of upper electrodes contacting the plurality of nonvolatile memory cells.