Dual alignment strategy for optimizing contact layer alignment

A method for optimizing contact layer registration during lithography utilizing a scanner in the fabrication of a semiconductor device, the device having a plurality of transistors having active and gate region features extending generally along a channel length (X) direction and a channel width (Y) direction, respectively, the method comprising:

• aligning contact layer overlay marks associated with a contact layer to gate layer alignment and overlay marks associated with a gate layer to identify channel length direction (X) linear components;
• aligning contact layer overlay marks associated with the contact layer to active layer alignment and overlay marks associated with the active layer to identify channel width direction (Y) linear components;
• using the channel length direction (X) linear components of the gate layer overlay marks to control a lens of the scanner for the correction and alignment of the contact layer in the channel length direction (X) of the semiconductor device;
• and
• using the channel width direction (Y) linear components of the active layer overlay marks to control a stage of the scanner for the correction and alignment of the contact layer in the channel width direction (Y) of the semiconductor device.

A method for optimizing contact layer registration during lithography utilizing a scanner in the fabrication of a semiconductor device, the device having a plurality of transistors having active and gate region features extending generally along a channel length (X) direction and a channel width (Y) direction, respectively, the method comprising:

• scanning alignment marks associated with a gate layer and aligning contact layer overlay marks associated with a contact layer to gate layer overlay marks associated with a gate layer to identify channel length direction (X) linear components;
• scanning alignment marks associated with an active layer and aligning contact layer overlay marks associated with the contact layer to active layer overlay marks associated with the active layer to identify channel width direction (Y) linear components;
• using the channel length direction (X) linear components of the gate layer overlay marks to control a lens of the scanner for the correction and alignment of the contact layer in the channel length direction (X) of the semiconductor device;
• and
• using the channel width direction (Y) linear components of the active layer overlay marks to control a stage of the scanner for the correction and alignment of the contact layer in the channel width direction (Y) of the semiconductor device.