Selective Etching Method and Method for Forming an Isolation Structure of a Memory Device
AssigneeHynix Semiconductor Inc.
InventorDae Jin Park
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Abstract
A disclosed selective etching method comprises mixing a polymer with carbon nanotubes, applying the mixture to an etching target layer to form a carbon nanotube-polymer composite layer, forming a hard mask by patterning the carbon nanotube-polymer composite layer, such that a part of the etching target layer is selectively exposed, and selectively etching the etching target layer exposed through the hard mask. The polymer preferably includes a photoresist. Also disclosed is a method for forming an isolation structure of a memory device using the selective etching method.
Claims7
A selective etching method comprising:
- forming a mixture comprising an organic antireflective coating (ARC) and carbon nanotubes;
- applying the mixture on an etching target layer, thereby forming a carbon nanotube-organic antireflective coating (ARC) composite layer;
- forming a hard mask by patterning the carbon nanotube—organic antireflective coating (ARC) composite layer, thereby selectively exposing a part of the etching target layer;
- and
- selectively etching the etching target layer exposed through the hard mask.
A method for isolating memory cells of a memory device using a selective etching method comprising:
- forming a tunneling dielectric layer on a semiconductor substrate;
- forming a charge storage layer on the tunneling dielectric layer;
- forming a pad layer on the charge storage layer;
- forming a composite layer of an organic antireflective coating (ARC) and a polymer as a hard mask on the pad layer;
- sequentially selectively etching the pad layer, the charge storage layer, the tunneling dielectric layer, and the semiconductor substrate, each exposed through the hard mask, to form a trench arranged in accordance with the resulting pattern of the charge storage layer;
- forming an insulating layer inside the trench to fill the trench with the insulating layer;
- and
- planarizing the insulating layer until the pad layer is exposed, thereby isolating each memory cell.
A method for forming an isolation structure of a memory device having memory cells using a selective etching method comprising:
- forming a tunneling dielectric layer on a semiconductor substrate;
- forming a charge storage layer on the tunneling dielectric layer;
- forming a pad layer on the charge storage layer;
- forming a mixture comprising an organic antireflective coating (ARC) and carbon nanotubes;
- coating the mixture on the pad layer, thereby forming a carbon nanotube—an organic antireflective coating (ARC) composite layer;
- exposing and developing the composite layer, thereby forming a composite layer pattern as a hard mask;
- sequentially selectively etching the pad layer, the charge storage layer, the tunneling dielectric layer, and the semiconductor substrate, each exposed through the hard mask, to form a trench arranged in accordance with the resulting pattern of the charge storage layer;
- forming an insulating layer inside the trench to fill the trench with the insulating layer;
- and
- planarizing the insulating layer until the pad layer is exposed thereby isolating each memory cell.
Dependencies are inferred from the claim text.