Mask rom devices and methods for forming the same

A method of forming a NOR type mask read only memory (MROM) device, comprising:

• forming first and second gate electrodes at an on-cell region and an off-cell region of a cell region of a substrate, respectively, and third and fourth gate electrodes at first and second transistor regions of a logic circuit region of the substrate;
• implanting impurities of a second conductivity type under a surface of the substrate located at both sides of the first and second gate electrodes to form a third impurity region adjacent the first gate electrode and a fourth impurity region adjacent the second gate electrode;
• implanting impurities of a first conductivity type into the on-cell region located at both sides of the first gate electrode and into the first transistor region located at both sides of the third gate electrode to form first doping regions adjacent the first and third gate electrodes;
• forming first, second, third, and fourth spacers on sidewalls of the first, second, third, and fourth gate electrodes, respectively;
• implanting impurities of the first conductivity type into a substrate between the first, second, and third spacers to form second doping regions extending from corresponding first doping regions and spaced apart from the corresponding gate electrode at the on-cell region of the cell region and at the first transistor region of the logic circuit region, and to form a second impurity region at the off-cell region, the first and second doping regions at the on-cell region constituting a first impurity region and the first and second doping regions at the first transistor region constituting a fifth impurity region;
• and
• implanting impurities of the second conductivity type into the second transistor region of the logic circuit region to form a sixth impurity region.