Cascaded local oscillator synthesizer
AssigneeLockheed Martin Corporation
InventorsLeopold E. Pellon, William G. Trueheart, JR.
Life of this patent
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Abstract
A representative integrated circuit comprises a clock signal generator that generates a clock signal, a code pattern generator that generates digital pattern data based on the clock signal, and multiple traversal local oscillator synthesizers that are coupled in a cascaded configuration. Each traversal local oscillator synthesizer includes a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array. The T-DAC provides frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal.
Claims20
An integrated circuit comprising:
- a clock signal generator that generates a clock signal;
- a code pattern generator that generates digital pattern data based on the clock signal;
- and
- multiple traversal local oscillator synthesizers that are coupled in a cascaded configuration, each traversal local oscillator synthesizer including a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array, the T-DAC unit receiving the digital pattern data and the clock signal, the T-DAC unit providing frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal.
A synthesizer comprising:
- a clock signal generator that generates a clock signal;
- memory including a code pattern generator that includes instructions for generating digital pattern data based on the clock signal;
- and
- multiple traversal local oscillator synthesizers that are coupled in a cascaded configuration, each traversal local oscillator synthesizer including a transversal digital-to-analog conversion (T-DAC) unit that receives the digital pattern data and the clock signal, the T-DAC unit providing frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal,
- wherein the clock signal generator, the T-DAC unit, and the memory are monolithically integrated together.
A local oscillator subsystem comprising:
- a signal generator unit that generates reference clock and Umod data;
- a silicon-germanium (SiGe) Heterojunction Bipolar Transistor (HBT) transistor that is coupled to the signal generator unit, and processes the reference clock and Umod data;
- and
- a cascaded transversal agile local oscillator synthesizer that receives the processed reference clock and Umod data, the cascaded transversal agile local oscillator synthesizer including:
- a clock signal generator that generates a clock signal based on the reference clock;
- a code pattern generator that generates digital pattern data based on the clock signal;
- and
- multiple traversal local oscillator synthesizers that are coupled in a cascaded configuration, each traversal local oscillator synthesizer including a transversal digital-to-analog conversion (T-DAC) unit that receives the digital pattern data and the clock signal, the T-DAC unit providing frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal.
Dependencies are inferred from the claim text.