Non-volatile memory device and driving method thereof

A method comprising:

• providing a non-volatile memory device including a floating gate formed over a first well having a first conductivity type, a first transistor for program and erase operations formed over a second well having a second conductivity type connected in series to the floating gate, and a second transistor formed over the second well for a reading operation connected in series to the floating gate;
• performing a program operation in which electrons are injected into a floating gate of the first transistor as a first voltage is applied to a source and a drain at opposite sides of the floating gate, a second voltage is applied to a drain of the first transistor, and a ground voltage is applied to the source of the first transistor and a source and the drain of the second transistor;
• performing an erase operation in which the electrons injected into the floating gate of the first transistor are moved into the drain of the first transistor as the ground voltage is applied to the source and drain of the floating gate and the source of the second transistor, a third voltage is applied to the drain of the first transistor, and the source of the first transistor and the drain of the second transistor are floated;
• and then
• performing a reading operation for reading an erase state under the flow of current from the drain of the second transistor to the source of the second transistor as a fourth voltage is applied to the source and drain of the floating gate, a fifth voltage is applied to the source of the first transistor and the drain of the second transistor, the ground voltage is applied to the source of the second transistor, and the drain of the first transistor is floated.