Nand nonvolatile semiconductor memory
OwnerDai NAKAMURA, Koichi FUKUDA +2inventors
InventorsDai NAKAMURA, Koichi FUKUDA, Yoshihisa WATANABE, Makoto IWAI
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OwnerDai NAKAMURA, Koichi FUKUDA +2inventors
InventorsDai NAKAMURA, Koichi FUKUDA, Yoshihisa WATANABE, Makoto IWAI
Estimating the term…
A NAND nonvolatile semiconductor memory includes a plurality of series-connected memory cells each includes a charge storage layer and control gate electrode, a plurality of word lines respectively connected to control gate electrodes of the memory cells, a first selection transistor connected between one end of the memory cells and a source line, a second selection transistor connected between the other end of the memory cells and a bit line, and a driver configured to control voltages applied to the word lines. The driver applies a first voltage to a first word line connected to a selected memory cell, and applies a cutoff voltage that cuts off a channel of a memory cell to second word lines of a number not less than three arranged side by side on the source line side with respect to the first word line during a write operation.
A NAND nonvolatile semiconductor memory comprising:
A NAND nonvolatile semiconductor memory comprising:
A NAND nonvolatile semiconductor memory comprising:
Dependencies are inferred from the claim text.