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US 2010/0165523 A1Published application
Integrated circuit
OwnerHee-Jeong SONinventor
Life of this patent
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Abstract
An integrated circuit includes: a pad configured to receive an external signal; an electrostatic discharge (ESD) protector coupled with the pad to provide an ESD path to a power source voltage line and a ground voltage line; an input buffer configured to receive the signal applied to the pad through an input terminal; and a PMOS transistor coupled between the input terminal of the input buffer and the ground voltage line, with a gate terminal coupled with the power source voltage line.
Claims12
An integrated circuit, comprising:
- a pad configured to receive an external signal;
- an electrostatic discharge (ESD) protector coupled with the pad to provide an ESD path to a power source voltage line and a ground voltage line;
- and
- an input buffer configured to receive the signal applied to the pad through an input terminal.
1 more element
Dependencies are inferred from the claim text.