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AssigneeSTMicroelectronics S.r.l.
InventorsCarlo Alberto Romani, Corrado Giorgio Castiglione, Massimo Scipioni, Elvio Romanucci, Donato Tancredi
Estimating the term…
A semiconductor device wherein a delay chain is integrated; the semiconductor device having a semiconductor layer. The delay chain includes a plurality of delay cells placed in the semiconductor layer and electrically connected to each other so as to form the delay chain. The semiconductor device includes a first and second metal lines respectively connected to a supply voltage and a reference voltage and placed in a longitudinal direction on a surface of the semiconductor layer; each delay cell of the plurality of cells is electrically connected with the first and second metal lines. Any delay cell and its successive or preceding delay cells of the delay chain are placed in a transversal direction with respect to the first or the second metal line.
A semiconductor device wherein a delay chain is integrated, the semiconductor device comprising a semiconductor layer, the delay chain comprising a plurality of delay cells placed in the semiconductor layer and electrically connected to each other so as to form the delay chain, the semiconductor device comprising first and second metal lines respectively connected to a supply voltage and a reference voltage and placed in a longitudinal direction on a surface of the semiconductor layer, each delay cell of the plurality of cells electrically connected with the first and second metal lines, wherein any delay cell and its successive or preceding delay cells of the delay chain are placed in a transversal direction with respect to the first or the second metal line.
An integrated circuit comprising:
Dependencies are inferred from the claim text.