Semiconductor device and driving method thereof

A semiconductor device, comprising:

• a plurality of synchronization clock generators configured to generate a plurality of synchronization clock signals by mixing phases of source clock signals applied to first and second input ends;
• a clock transmission path configured to sequentially apply the source clock signal transferred in a forward direction to the first input end of each of the plurality of synchronization clock generators and sequentially applying the source clock signal transferred in a backward direction to the second input end of each of the plurality of synchronization clock generators;
• and
• a plurality of data output units configured to synchronize a plurality of data with the plurality of synchronization clock signals and outputting the synchronized plurality of data.

A method for driving a semiconductor device, comprising:

• delaying a first source clock signal as much as a time corresponding to a first delay amount within a total delay amount;
• delaying a second source clock signal having a frequency identical to a frequency of the first source clock signal as much as a time corresponding to a second delay amount which is a result of subtracting the first delay amount from the total delay amount;
• generating a plurality of synchronization clock signal by mixing a phase of the delayed first source clock signal with a phase of the delayed second source clock signal;
• and
• synchronizing a plurality of data with the plurality of synchronization clock signals and outputting the synchronized data.