Phase mixer and delay locked loop including the same

A delay locked loop, comprising:

• a phase comparator configured to compare a phase of an external clock with a phase of a feedback clock to output a comparison signal;
• a delay line configured to output an internal clock by delaying the external clock in response to the comparison signal;
• a replica model configured to receive the internal clock to output the feedback clock;
• and
• a phase value adjuster configured to control an operation of the delay line so that the delay value of the delay line is adjusted in response to a code signal coding a process, voltage, and temperature (PVT) variation.