Circuit arrangement for filtering unwanted signals from a clock signal, processing system and method of filtering unwanted signals from a clock signal

A circuit arrangement for detecting unwanted signals on a clock signal, the circuit arrangement comprising:

• an input for receiving the clock signal;
• a loop circuit including a frequency multiplier having a reference input coupled to the input of the circuit arrangement for receiving the clock signal and an output for providing a loop output signal, a frequency of the loop output signal being a multiple of a frequency of the clock signal;
• a detector coupled to the output of the loop circuit and to the input of the circuit arrangement, the detector being arranged to identify correct transitions in the clock signal using the loop output signal, and to remove incorrect transitions due to unwanted signals from the clock signal so as to provide a filtered clock signal at an output of the circuit arrangement.