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US 2010/0164540 A1Published application
Semiconductor Memory Device
OwnerKi-Chang Kweaninventor
Life of this patent
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Abstract
A semiconductor memory device includes a reference voltage pad for receiving a reference voltage from an external device, a calibration resistor connected to a calibration node where an external resistor is connected to and having a resistor value decided according to a calibration code, and a calibration code generator for generating the calibration code by comparing a voltage of the calibration node and the reference voltage.
Claims9
A semiconductor memory device, comprising:
- a reference voltage pad for receiving a reference voltage from an external device;
- a calibration resistor connected to a calibration node where an external resistor is connected to and having a resistor value decided according to a calibration code;
- and
- a calibration code generator for generating the calibration code by comparing a voltage of the calibration node and the reference voltage.
1 more element
A semiconductor memory device, comprising:
- a reference voltage pad for receiving a reference voltage from an external device;
- a first calibration resistor connected to a calibration node connected to an external resistor and having a resistor value decided according to a first calibration code;
- a first calibration code generator for generating the first calibration code by comparing a voltage of the calibration node and the reference voltage;
- a second calibration resistor connected to a predetermined node and having a resistor value decided according to the first calibration code and a second calibration code;
- a second calibration code generator for generating the second calibration code by comparing the reference voltage and a voltage of the predetermined node;
- and
- a termination resistor for matching impedance with a resistor value decided based on the first and second calibration codes.
4 more elements
Dependencies are inferred from the claim text.