Tunable stress technique for reliability degradation measurement
AssigneeTexas Instruments Incorporated
InventorsAndrew Marshall, Vijay Kumar Reddy
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Abstract
Apparatus and methods are disclosed for examining how reliability in an RF power amplifier circuit changes as a function of variation of the input to output voltage swings. Two output transistors that varying greatly in the size of their respective channel widths are provided for independently evaluating impacts on the output waveform. The gate control for the smaller transistor is separate from the gate control to the larger transistor. The gate and drain stress can thus be adjusted and evaluated independently.
Claims20
A method to evaluate optimum power amplifier switching characteristics for determining reliability limitations, the method comprising:
- examining operating characteristics of a first transistor in a circuit generating an output waveform;
- coupling at least one second transistor comprising a gate terminal to the first transistor;
- applying a variable signal to the second transistor;
- and
- adjusting a stress to the gate terminal of the second transistor independent of the first transistor without altering any operating characteristics of the first transistor.
A circuit to modify gate/drain stress characteristics in RF circuitry for determining reliability variation as a function of gate/drain voltage and generate an output waveform, comprising:
- a plurality of output transistors comprising a first transistor and at least one second transistor, wherein the first transistor is coupled to the second transistor;
- a resonant tank coupled to the first transistor;
- a first signal control coupled to the first transistor;
- a second signal control coupled to the second transistor and to the first signal control, wherein the second signal control comprising:
- a signal generator configured to provide a variable signal to the second transistor;
- and
- an adjusting mechanism coupled to the signal generator, and configured to adjust the signal generator and alter the variable signal to the second transistor without affecting the output of the first transistor, and comprising a delay control and an increase control to delay or advance a characteristic of the variable signal relative to an output of the first transistor.
A circuit to modify stress characteristics in RF circuitry for determining reliability variation as a function of gate to drain voltage and generate an output waveform, comprising:
- a plurality of output transistors comprising a first transistor and at least one second transistor, wherein the first transistor is coupled to the second transistor;
- a capacitor and an inductor coupled to the first transistor;
- a first switchable inverter coupled to a gate terminal of the first transistor;
- a second switchable inverter coupled to a gate terminal of the second transistor and to the first switchable inverter, wherein the second switchable inverter comprises a switch coupled to a transmission gate for generating a variable signal, and an adjusting control configured to vary a timing offset of the variable signal and allow degradation to be measured.
Dependencies are inferred from the claim text.