Reference voltage generation circuit
AssigneeNational University Corporation Hokkaido University
InventorsTetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, Kenichi Ueno
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AssigneeNational University Corporation Hokkaido University
InventorsTetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, Kenichi Ueno
Estimating the term…
An object of the present invention is to generate a reference voltage that is stable in relation to manufacturing process variations, by matching the operating regions of the MOSFETs contributing to generation of the reference voltage. The reference voltage generation circuit 1 includes: a current mirror unit 2 that generates a current IP at current output terminals PC1 to PC5; a MOSFET 6b having a drain terminal connected to the current output terminal PC2 side, a source terminal connected to ground side, and a gate terminal connected to a reference voltage output terminal POUT; a combined voltage generating unit 8 having two MOSFET pairs in which currents are generated at drain terminals from the current output terminals PC3 to PC5, source terminals are mutually connected, and a combined voltage with a positive temperature coefficient is generated; and a MOSFET 9 in which current is generated at a drain terminal from the current mirror unit 2, a gate terminal is connected to the input of the combined voltage generating unit 8, a source terminal is connected to the ground side, and a voltage with a negative temperature coefficient is generated.
A reference voltage generation circuit comprising:
Dependencies are inferred from the claim text.