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US 2010/0164123 A1Published application
Local silicidation of via bottoms in metallization systems of semiconductor devices
AssigneeGlobalfoundries Inc.
InventorsTobias Letz, Frank Feustel
Life of this patent
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Abstract
Electromigration behavior in complex metallization systems of semiconductor devices may be enhanced at critical areas between a metal line and a via by locally forming a copper/silicon compound. In some illustrative embodiments, the formation of the copper/silicon compound may be combined with other treatments for cleaning the exposed surface areas and/or modifying the molecular structure thereof.
Claims22
A method of forming a metallization system of a semiconductor device, the method comprising:
- forming an opening in a dielectric layer of a first metallization layer of said metallization system, said opening exposing a portion of a copper-containing metal region of a second metallization layer of said metallization system;
- and
- forming a copper/silicon compound selectively in said exposed portion of said copper-containing metal region.
A method, comprising:
- forming a dielectric cap material on a copper-containing surface of a metal region of a first metallization layer of a metallization system of a semiconductor device;
- forming a low-k dielectric material of a second metallization layer above said dielectric cap material;
- forming an opening in said low-k dielectric material so as to expose a portion of said copper-containing surface;
- and
- forming a silicon and copper-containing mixture in said metal region through said portion of said copper-containing surface.
2 more elements
A semiconductor device, comprising:
- a first low-k dielectric layer formed above a substrate and comprising a first copper-containing metal region;
- a dielectric cap layer formed on said first low-k dielectric layer and said copper-containing metal region;
- a second low-k dielectric layer formed on said dielectric cap layer and comprising a second copper-containing metal region;
- a metal-filled via formed in said second low-k dielectric layer and said dielectric cap layer, said metal-filled via connecting said first and second metal regions;
- and
- a copper silicide material formed at least around an interface formed by said first metal region and said via, said copper silicide material extending to a depth within said first metal region that is greatest at said interface.
3 more elements
Dependencies are inferred from the claim text.