Semiconductor package apparatus and manufacturing method thereof

A method comprising:

• bonding a first semiconductor chip having a first metal wire to a substrate;
• conductively bonding a second semiconductor chip having a second metal wire to the first semiconductor chip at an interface between the second metal wire and the first metal wire;
• and
• conductively bonding a third semiconductor chip having a third metal wire to the first semiconductor chip at an interface between the third metal wire and the first metal wire such that the third semiconductor chip is disposed laterally relative to the second semiconductor chip.

An apparatus comprising:

• a substrate;
• a first semiconductor chip having a plurality of first metal wires formed therein, the first semiconductor chip being bonded to the substrate at a first surface of the first semiconductor chip such that a second surface of the first semiconductor chip is exposed;
• a second semiconductor chip having a plurality of second metal wires formed therein that are spatially aligned and corresponds to a first set of the first metal wires, the second semiconductor chip being conductively bonded to the first semiconductor chip at the exposed second surface of the first semiconductor chip and at an interface between the second metal wires and the first metal wires;
• and
• a third semiconductor chip having a plurality of third metal wires formed therein that are spatially aligned and corresponds to a second set of the first metal wires, the third semiconductor chip being conductively bonded to the first semiconductor chip at the exposed second surface of the first semiconductor chip on the same plane as the second semiconductor chip and at an interface between the third metal wires and the first metal wires.