Dielectric separator layer

A method comprising:

• providing a substrate;
• stacking interlevel dielectric layers over said substrate;
• and
• separating said interlevel dielectric layers with a dielectric separator layer, wherein said dielectric separator layer comprises a modified lower layer and an upper layer.

A method comprising:

• providing an inlaid interconnect in an interlevel dielectric layer, said inlaid interconnect comprising a via and an overlying trench;
• forming a lower layer over said inlaid interconnect and said interlevel dielectric, the lower layer comprising silicon and carbon;
• densifying said lower layer to convert said lower layer to a modified lower layer with a k value of between 3.4 and 6.1;
• forming an upper layer over said modified lower layer, the upper layer being at least five times as thick as the lower layer and having a k value between 4.3 and 7.0;
• forming a second interlevel dielectric layer on the upper layer, the second interlevel dielectric layer having a thickness at least twenty times as thick as the upper layer and having a k value less than 2.75;
• etching the second interlevel dielectric layer to form a via opening, the upper layer acting as an etch stop layer for the etch;
• and
• filling the via opening with a barrier layer and conductor layer, the barrier layer extending from at least the top of the second interlevel dielectric layer to at least the lower layer.

A structure comprising:

• a substrate;
• an interlevel dielectric layer disposed over said substrate;
• an opening disposed in said interlevel dielectric layer layer;
• a conductor disposed in said opening;
• and
• a dielectric separator layer disposed over said conductor and said interlevel dielectric layer, the dielectric separator layer comprising a lower layer and an upper layer, the lower layer having a k value between 3.4 and 6.1, the upper layer being at least five times as thick as the lower layer and having a k value between 4.3 and 7.0;
• a second interlevel dielectric layer on the upper layer, the second interlevel dielectric layer having a thickness at least twenty times as thick as the upper layer and having a k value less than 2.75;
• a barrier layer and conductor layer extending from at least a top of the second interlevel dielectric layer to at least the lower layer.