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US 2010/0164002 A1Published application
Dual salicide integration for salicide through trench contacts and structures formed thereby
AssigneeIntel Corporation
InventorsOleg Golonzka, Bernhard Sell
Life of this patent
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Abstract
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming an NMOS silicide on an NMOS source/drain contact area, forming a first contact metal on the NMOS silicide, polishing the first contact metal to expose a top surface of a PMOS source/drain region, and forming a PMOS silicide on the PMOS source/drain region.
Claims30
A method comprising:
- forming an NMOS silicide on an NMOS source/drain contact area;
- forming a first contact metal on the NMOS silicide;
- polishing the first contact metal to expose a top surface of a PMOS source/drain region;
- and
- forming a PMOS silicide on the PMOS source/drain region.
2 more elements
A method comprising:
- forming an NMOS contact opening in a first ILD disposed on a substrate, wherein an NMOS source/drain contact area is exposed and a PMOS source/drain contact area is covered;
- forming an NMOS silicide on the exposed NMOS source/drain contact area;
- forming a first contact metal on the NMOS suicide to fill the NMOS contact opening;
- polishing the first contact metal to expose a top surface of a PMOS raised source/drain region disposed on the substrate;
- and
- forming a PMOS silicide on the PMOS raised source/drain region.
3 more elements
A structure comprising:
- an NMOS silicide disposed on an NMOS source/drain contact area of a substrate;
- a first contact metal disposed on the NMOS silicide;
- and
- a PMOS silicide disposed on a PMOS source/drain region of the substrate, wherein the NMOS silicide and the PMOS silicide comprise different material compositions from each other.
1 more element
A structure comprising:
- an NMOS suicide disposed on an NMOS source/drain contact area of a substrate;
- a first contact metal disposed on the NMOS silicide;
- and
- a PMOS silicide disposed on a PMOS source/drain region of the substrate, wherein the first contact metal does not contact the PMOS silicide.
1 more element
Dependencies are inferred from the claim text.