Dielectric Punch-Through Stoppers for Forming FinFETs Having Dual Fin Heights

A semiconductor structure comprising:

• a semiconductor substrate;
• a first shallow trench isolation (STI) region over the semiconductor substrate and having a first top surface and a first bottom surface;
• a second STI region over the semiconductor substrate and having a second top surface substantially level with the first top surface of the first STI region, and a second bottom surface substantially level with the first bottom surface of the first STI region;
• a first fin adjacent to, and above, the first STI region;
• a second fin adjacent to, and above, the second STI region, wherein the second fin has a top surface substantially level with a top surface of the first fin, and wherein the first fin and the second fin have different fin heights;
• a first lower fin underlying and vertically aligned to the first fin, wherein the first lower fin has a bottom surface substantially level with the first bottom surface of the first STI region;
• and
• a first punch-through stopper between and adjoining the first fin and the first lower fin.

A semiconductor structure comprising:

• a semiconductor substrate;
• a first semiconductor fin above the semiconductor substrate and comprising a first top surface, wherein the first semiconductor fin comprises a first upper portion and a first lower portion;
• a first punch-through stopper between and adjoining the first upper portion and the first lower portion of the first semiconductor fin;
• a second semiconductor fin above the semiconductor substrate and comprising a second top surface substantially level with the first top surface of the first semiconductor fin, wherein the second semiconductor fin comprise a second upper portion and a second lower portion, and wherein the first upper portion and the second upper portion have different heights;
• and
• a second punch-through stopper between and adjoining the second upper portion and the second lower portion of the second semiconductor fin.