Embedded memory cell and method of manufacturing same

A method of manufacturing an embedded memory cell, the method comprising:

• providing a semiconducting substrate;
• forming a transistor having a source/drain region at least partially embedded in the semiconducting substrate;
• forming a capacitor having:
• a first electrode at least partially embedded in the semiconducting substrate and electrically connected to the semiconducting substrate;
• a second electrode at least partially embedded in the semiconducting substrate and electrically connected to the source/drain region;
• and
• a first electrically insulating material that electrically isolates the first electrode and the second electrode from each other.

A method of manufacturing an embedded DRAM cell, the method comprising:

• providing a semiconducting substrate having a p-type doping;
• forming a transistor having a source/drain region at least partially embedded in the semiconducting substrate, the source/drain region having an n-type doping;
• forming a trench in the semiconducting substrate;
• depositing a high work function metal in the trench such that the high work function metal electrically contacts the semiconducting substrate;
• depositing a first electrically insulating material in the trench over the high work function metal;
• and
• depositing a low work function metal in the trench over the first electrically insulating material such that the low work function metal is electrically isolated from the high work function metal and such that the low work function metal electrically contacts the source/drain region.