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US 2010/0163880 A1Published application
Thin film transistor array panel and method for manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorSang-Jin JEON
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Abstract
A thin film transistor array panel comprises a repair line disposed in a peripheral area of a display area and being configured to repair when at least one of a gate line and a data line are disconnected, and a detour line disposed in the peripheral area and comprising at least one resistor having higher resistance than a remaining portion of the detour line, wherein both ends of the detour line are connected to the repair line to protect the array panel.
Claims20
A thin film transistor array panel, comprising:
- a substrate comprising a display area and a peripheral area;
- a thin film transistor disposed in the display area;
- a gate line disposed in the display area and connected to the thin film transistor;
- a data line disposed in the display area and connected to the thin film transistor;
- a pixel electrode disposed in the display area and connected to the thin film transistor;
- a first repair line disposed in the peripheral area and being configured to repair when at least one of the gate line and the data line is disconnected;
- and
- a first detour line disposed in the peripheral area and comprising at least one first resistor having a higher resistance than a remaining portion of the first detour line, wherein the first detour line comprises two ends and both ends of the first detour line are connected to the first repair line.
5 more elements
A thin film transistor array panel comprising:
- a substrate comprising a display area and a peripheral area;
- a thin film transistor disposed in the display area;
- a gate line disposed in the display area and connected to the thin film transistor;
- a data line disposed in the display area and connected to the thin film transistor;
- a pixel electrode disposed in the display area and connected to the thin film transistor;
- a first repair line disposed in the peripheral area and being configured to repair when at least one of the gate line and the data line is disconnected;
- and
- a first detour line disposed in the peripheral area, wherein the first detour line comprises two ends and both ends of the first detour line are connected to the first repair line, and
- wherein a first diode is connected between the first detour line and the first repair line.
6 more elements
A method of manufacturing a thin film transistor array panel, comprising:
- forming a thin film element comprising a gate line, a data line, and a thin film transistor in each cell region on a mother substrate comprising a plurality of cell regions;
- forming a guide ring enclosing the periphery of each cell region;
- and
- cutting a portion where the guide ring is formed to separate each cell region,
- wherein the guide ring comprises a group of a plurality of point-type conductors that are spaced apart from each other.
2 more elements
Dependencies are inferred from the claim text.