Thin film transistor array substrate and method of fabricating the same

A method of fabricating a thin film transistor (TFT) array substrate, the method comprising;

• forming a gate interconnection line on an insulating substrate, the gate interconnection line comprising a gate line and a gate electrode;
• forming a gate insulating layer on the gate interconnection line;
• forming a semiconductor layer and a data interconnection line on the semiconductor layer, the data interconnection line comprising a data line, a source electrode, and a drain electrode;
• sequentially forming a first passivation layer and a second passivation layer on the data interconnection line;
• etching the second passivation layer and the first passivation layer using dry etching and wet etching, and exposing a drain electrode of a drain electrode-pixel electrode contact portion;
• and
• forming a pixel electrode connected to the drain electrode, wherein the wet etching forms an undercut in the side of the first passivation layer corresponding to the drain electrode-pixel electrode contact portion.

A thin film transistor (TFT) array substrate, comprising;

• a gate interconnection line comprising a gate line and a gate electrode arranged on an insulating substrate;
• a gate insulating layer arranged on the gate interconnection line;
• a semiconductor layer arranged on the gate insulating layer;
• a data interconnection line comprising a data line, a source electrode, and a drain electrode arranged on the semiconductor layer;
• a first passivation layer arranged on the data interconnection line and exposing a portion of the drain electrode;
• a pixel electrode electrically connected to the drain electrode, and formed on the first passivation layer corresponding to the transmission area of the display area.