Phase-change random access memory capable of reducing thermal budget and method of manufacturing the same

A method of manufacturing a phase-change memory device, the method comprising:

• preparing a semiconductor substrate defining a cell area and a peripheral area;
• forming a junction area in the cell area;
• forming a transistor having a gate electrode including a single conductive layer in the peripheral area;
• forming a first interlayer dielectric layer at an upper portion of the semiconductor substrate;
• forming a contact hole by selectively etching through the first interlayer dielectric layer to expose a predetermined portion of the junction area;
• growing an epitaxial layer so that the contact hole is filled in with the epitaxial layer;
• planarizing the epitaxial layer and the first interlayer dielectric layer to expose a surface of the gate electrode;
• forming a PN diode in the epitaxial layer filled in the contact hole;
• and
• forming an ohmic contact layer over the PN diode and a conductivity compensating layer over the gate electrode with a silicide layer over the PN diode and the gate electrode.

A phase-change random access memory comprising:

• a semiconductor substrate defining a cell area and a peripheral area;
• a junction area formed in the cell area of the semiconductor substrate;
• a transistor which includes a gate electrode having a predetermined height and formed in the peripheral area of the semiconductor substrate;
• and
• a PN diode electrically connected with the word line area, wherein the gate electrode includes a single conductive layer, and has a height substantially matching that of the PN diode.