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US 2010/0163827 A1Published application
Forming phase change memory cells
AssigneeSTMicroelectronics S.r.I.
InventorsYudong Kim, Fabio Pellizzer
Life of this patent
Estimating the term…
Abstract
Small phase change memory cells may be formed by forming a segmented heater over a substrate. A stop layer may be formed over the heater layer and segmented with the heater layer. Then, sidewall spacers may be formed over the segmented heater to define an aperture between the sidewall spacers that may act as a mask for etching the stop layer over the segmented heater. As a result of the etching using the sidewall spacers as a mask, sublithographic pore may be formed over the heater. Phase change material may be formed within the pore.
Claims21
A method comprising:
- forming a heater layer over a substrate;
- forming a plurality of discrete heaters over said substrate by etching said heater layer to;
- forming stop layers on the heaters, respectively, forming sidewall spacers over said heaters and stop layers;
- and
- forming sublithographic pores over said heaters, the forming sublithographic pores including etching the stop layers using said sidewall spacers as a first mask.
2 more elements
A memory comprising:
- a substrate;
- segmented heaters over said substrate;
- stop layer edge portions positioned on respective edges of the heaters;
- sidewall spacers positioned respectively over the stop layer edge portions and respective edges of said segmented heaters, respective pairs of the the sidewall spacers and respective pairs of the stop layer edge portions defining respective sublithographic pores;
- and
- chalcogenide memory regions in said pores.
3 more elements
A system comprising:
- a processor;
- a memory coupled to said processor, said memory including a substrate;
- segmented heaters over said substrate;
- stop layer edge portions positioned on respective edges of the heaters;
- sidewall spacers positioned respectively over the stop layer edge portions and respective edges of said segmented heaters, respective pairs of the the sidewall spacers and respective pairs of the stop layer edge portions defining respective sublithographic pores;
- and
- chalcogenide memory regions in said pores.
4 more elements
Dependencies are inferred from the claim text.