Software-based Thread Remapping for power Savings
AssigneeIntel Corporation
InventorJustin J. Song
Life of this patent
Estimating the term…
Abstract
On a multi-core processor that supports simultaneous multi-threading, the power state for each logical processor is tracked. Upon indication that a logical processor is ready to transition into a deep low power state, software remapping (e.g., thread-hopping) may be performed. Accordingly, if multiple logical processors, on different cores, are in a low-power state, they are re-mapped to same core and the core is then placed into a low power state. Other embodiments are described and claimed.
Claims30
A method comprising:
- based on power state information for a first thread unit of a first processor core and a first thread unit of a second processor core, swapping work from the first thread unit of the first core to the first thread unit of the second core;
- placing the first thread unit of the second core into a first power state,
- placing the first thread unit of the first core into a second power state;
- and
- placing the second core into a first core power state.
A system comprising:
- a chip package comprising a first processor, that includes a plurality of thread units, coupled to a second processor, that includes a plurality of thread units;
- a power module to determine that a first thread unit of the first processor is ready to enter an idle power state;
- and
- a scheduler module to swap work from a first thread unit of the second processor to the first thread unit of the first processor based on power state information, and to decline to place said first thread unit of the first processor into said idle power state;
- wherein the scheduler module is further to swap said work responsive to determining that the second core includes a second thread unit that is in the idle power state.
A computer program product, comprising a computer usable medium having a computer readable program code embodied therein, said computer readable program code adapted to be executed to implement a method, said method comprising:
- based on power state information for a first thread unit of a first processor core and a first thread unit of a second processor core, swapping work from the first thread unit of the first core to the first thread unit of the second core;
- placing the first thread unit of the second core into a first power state,
- placing the first thread unit of the first core into a second power state;
- and
- placing the second core into a first core power state.
Dependencies are inferred from the claim text.