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US 2010/0142270 A1Published application
Semiconductor memory device and semiconductor memory system storing multilevel data
AssigneeKabushiki Kaisha Toshiba
InventorNoboru SHIBATA
Life of this patent
Estimating the term…
Abstract
A first memory cell stores data of k bits in one cell. A second memory cell stores data of h bits (h<k) in one cell. Data of i bits (i<=k) is stored in the first memory cell, and data of h bits (h<i) generated from the i-bit data is stored in the second memory cell.
Claims20
A semiconductor memory device comprising:
- a first memory cell configured to store data of k bits (k is a natural number of 2 or more);
- and
- a second memory cell configured to store data of h bits (h<k);
- wherein the first memory cell stores data of i bits (i<=K), and the second memory cell stores data of h bits (h<i) generated from the data of i bits.
1 more element
A semiconductor memory system comprising:
- a first memory cell which stores data of k bits (k is a natural number of 2 or more);
- and
- data of i bits (i<=k) which stores data in the first memory cell,
- wherein the data of i bits is stored in the first memory cell to generate data of h bits (h<i) from the data of i bits.
1 more element
A storage method of a semiconductor memory device, comprising:
- storing data of i bits (i<=k) (k is a natural number of 2 or more) in a first memory cell;
- and
- storing data of h bits (h<i) generated from the i-bit data in a second memory cell.
Dependencies are inferred from the claim text.