Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, active matrix substrate manufacturing method, and liquid crystal panel manufacturing method

An active matrix substrate, comprising:

• scanning signal lines each extending in a row direction;
• data signal lines each extending in a column direction;
• and
• pixel regions each including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• each of the scanning signal lines including
• a first opening extending from outside a pixel region into the pixel region by crossing under a data signal line,
• a second opening positioned side by side with respect to the first opening in a row direction,
• a bridging electrode section positioned on a space between the first opening and the second opening, and
• a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to a wormhole region consisting of the first opening, the second opening, and the bridging electrode section in such a manner that the first scanning electrode section and the second scanning electrode section sandwich the wormhole region in a column direction,
• a source electrode and a drain electrode of the first transistor being provided so as to overlap the first scanning electrode section and not to overlap a first end portion in the pixel region, and a source electrode and a drain electrode of the second transistor being provided so as to overlap the second scanning electrode section and not to overlap a second end portion in the pixel region, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction and the second end portion is a portion within the pixel region out of two end portions of the second scanning electrode section in a row direction.

An active matrix substrate, comprising:

• scanning signal lines each extending in a row direction;
• data signal lines each extending in a column direction;
• and
• pixel regions each including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• each of the scanning signal lines including an opening extending from outside a pixel region into the pixel region by crossing under a data signal line, and a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to the opening in such a manner that the first scanning electrode section and the second scanning electrode section face each other in a column direction with the opening therebetween,
• a first gate extending section being drawn from the first scanning electrode section in a direction away from the opening in the pixel region, and a second gate extending section being drawn from the second scanning electrode section in a direction away from the opening in the pixel region,
• a source electrode and a drain electrode of the first transistor being provided so as to overlap the first gate extending section and not to overlap a first end portion, and a source electrode and a drain electrode of the second transistor being provided so as to overlap the second gate extending section and not to overlap a second end portion, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction and the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction.

An active matrix substrate, comprising:

• scanning signal lines each extending in a row direction;
• data signal lines each extending in a column direction;
• and
• pixel regions each including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• each of the scanning signal lines including
• a first opening extending from outside a pixel region into the pixel region by crossing under a data signal line,
• a second opening positioned side by side with respect to the first opening in a row direction,
• a bridging electrode section positioned on a space between the first opening and the second opening, and
• a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to a wormhole region consisting of the first opening, the second opening, and the bridging electrode section in such a manner that the first scanning electrode section and the second scanning electrode section sandwich the wormhole region in a column direction,
• a first gate extending section being drawn from the first scanning electrode section in a direction away from the opening in the pixel region, and a second gate extending section being drawn from the second scanning electrode section in a direction away from the opening in the pixel region,
• a source electrode and a drain electrode of the first transistor being provided so as to overlap the first gate extending section and not to overlap a first end portion, and a source electrode and a drain electrode of the second transistor being provided so as to overlap the second gate extending section and not to overlap a second end portion, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction and the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction.

A method for producing an active matrix substrate including:

• scanning signal lines each extending in a row direction in such a manner as to cross pixel regions;
• and data signal lines each extending in a column direction in such a manner as to be along edges of pixel regions, each of the pixel regions including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• said method comprising the steps of:
• forming a scanning signal line including (i) an opening extending from outside a pixel region into the pixel region and (ii) a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to the opening in such a manner that the first scanning electrode section and the second scanning electrode section face each other in a column direction with the opening therebetween;
• forming (i) a first transistor whose gate electrode is a part of the first scanning electrode, (ii) a second transistor whose gate electrode is a part of the second scanning electrode, and (iii) the data signal line;
• determining whether a short-circuit between the data signal line and the first scanning electrode section exists or not, and whether a short-circuit between the data signal line and the second scanning electrode section exists or not;
• when a short-circuit between the data signal line and the first scanning electrode section exists, separating the first scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a first end portion and a third end portion, and when a short-circuit between the data signal line and the second scanning electrode section exists, separating the second scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a second end portion and a fourth end portion, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction, the third end portion being an end portion outside the pixel region out of the two end portions of the first scanning electrode section in a row direction, the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction, and the fourth end portion being an end portion outside the pixel region out of the two end portions of the second scanning electrode section in a row direction.

A method for producing a liquid crystal panel including an active matrix substrate including:

• scanning signal lines each extending in a row direction in such a manner as to cross pixel regions;
• and data signal lines each extending in a column direction along edges of pixel regions, each of the pixel regions including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• said method comprising the steps of:
• forming a scanning signal line including (i) an opening extending from outside a pixel region into the pixel region and (ii) a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to the opening in such a manner that the first scanning electrode section and the second scanning electrode section face each other in a column direction with the opening therebetween;
• forming (i) a first transistor whose gate electrode is a part of the first scanning electrode, (ii) a second transistor whose gate electrode is a part of the second scanning electrode, and (iii) the data signal line;
• determining whether a short-circuit between the data signal line and the first scanning electrode section exists or not, and whether a short-circuit between the data signal line and the second scanning electrode section exists or not;
• when a short-circuit between the data signal line and the first scanning electrode section exists, separating the first scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a first end portion and a third end portion, and when a short-circuit between the data signal line and the second scanning electrode section exists, separating the second scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a second end portion and a fourth end portion, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction, the third end portion being an end portion outside the pixel region out of the two end portions of the first scanning electrode section in a row direction, the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction, and the fourth end portion being an end portion outside the pixel region out of the two end portions of the second scanning electrode section in a row direction.

A method for producing an active matrix substrate including:

• scanning signal lines each extending in a row direction in such a manner as to cross pixel regions;
• and data signal lines each extending in a column direction in such a manner as to be along edges of pixel regions, each of the pixel regions including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• said method comprising the steps of:
• forming a scanning signal line including (i) a first opening with a rectangular shape, extending from outside a pixel region into the pixel region, (ii) a second opening positioned side by side with respect to the first opening in a row direction, (iii) a bridging electrode section serving as a space between the first opening and the second opening, and (iv) a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to a wormhole region consisting of the first opening, the second opening, and the bridging electrode section in such a manner that the first scanning electrode section and the second scanning electrode section face each other in a column direction with the wormhole region therebetween;
• forming (i) a first transistor whose gate electrode is a part of the first scanning electrode, (ii) a second transistor whose gate electrode is a part of the second scanning electrode, and (iii) the data signal line;
• determining whether a short-circuit between the data signal line and the first scanning electrode section exists or not, and whether a short-circuit between the data signal line and the second scanning electrode section exists or not;
• when a short-circuit between the data signal line and the first scanning electrode section exists, separating the first scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a first end portion, a third end portion, and the bridging electrode section, and when a short-circuit between the data signal line and the second scanning electrode section exists, separating the second scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a second end portion, a fourth end portion, and the bridging electrode section, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction, the third end portion being an end portion outside the pixel region out of the two end portions of the first scanning electrode section in a row direction, the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction, and the fourth end portion being an end portion outside the pixel region out of the two end portions of the second scanning electrode section in a row direction.

A method for producing a liquid crystal panel including an active matrix substrate including:

• scanning signal lines each extending in a row direction in such a manner as to cross pixel regions;
• and data signal lines each extending in a column direction along edges of pixel regions, each of the pixel regions including a first transistor and a second transistor that are connected with a same data signal line, a first pixel electrode connected with the first transistor, and a second pixel electrode connected with the second transistor,
• said method comprising the steps of:
• forming a scanning signal line including (i) a first opening with a rectangular shape, extending from outside a pixel region into the pixel region, (ii) a second opening positioned side by side with respect to the first opening in a row direction, (iii) a bridging electrode section serving as a space between the first opening and the second opening, and (iv) a first scanning electrode section and a second scanning electrode section that are provided on respective sides adjacent to a wormhole region consisting of the first opening, the second opening, and the bridging electrode section in such a manner that the first scanning electrode section and the second scanning electrode section face each other in a column direction with the wormhole region therebetween;
• forming (i) a first transistor whose gate electrode is a part of the first scanning electrode, (ii) a second transistor whose gate electrode is a part of the second scanning electrode, and (iii) the data signal line;
• determining whether a short-circuit between the data signal line and the first scanning electrode section exists or not, and whether a short-circuit between the data signal line and the second scanning electrode section exists or not;
• when a short-circuit between the data signal line and the first scanning electrode section exists, separating the first scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a first end portion, a third end portion, and the bridging electrode section, and when a short-circuit between the data signal line and the second scanning electrode section exists, separating the second scanning electrode section including a short-circuited portion from the scanning signal line by cutting an electrode at a second end portion, a fourth end portion, and the bridging electrode section, the first end portion being an end portion within the pixel region out of two end portions of the first scanning electrode section in a row direction, the third end portion being an end portion outside the pixel region out of the two end portions of the first scanning electrode section in a row direction, the second end portion being an end portion within the pixel region out of two end portions of the second scanning electrode section in a row direction, and the fourth end portion being an end portion outside the pixel region out of the two end portions of the second scanning electrode section in a row direction.