Digital-to-analog conversion circuit and column driver including the same

A column driver comprising:

• a shift register configured to generate a plurality of latch signals in response to a start pulse and a clock signal;
• a sampling latch configured to receive red-green-blue (RGB) digital data and latch the received digital data in response to the latch signals received from the shift register;
• a holding latch configured to receive the digital data output from the sampling latch circuit and output the digital data in response to a load signal;
• a plurality of digital-to-analog converters (DACs), each DAC configured to output two adjacent and different analog voltages from a plurality of consecutive analog gamma reference voltages based on upper bits of the digital data;
• and
• a plurality of buffer amplifiers, each buffer amplifier receiving the two adjacent analog voltages from a respective one of the DACs and configured to divide a range between the two adjacent analog voltages into as many analog voltages as a number based on the number of lower bits of the digital data and output one of the many analog voltages based on the lower bits,
• wherein each buffer amplifier comprises:
• two input terminals, wherein one of the two input terminals receives a first one of the two adjacent analog voltages and the other input terminal receives the other adjacent analog voltage;
• and
• a current digital-to-analog converter configured to generate a current from a first current flowing into one of the two input terminals and a second current flowing into the other one of the two input terminals based on the lower bits,
• wherein the current digital-to-analog converter comprises:
• a plurality of current dividers cascade connected to one another and numbering the number of bits of the lower bits;
• and
• a plurality of pairs of switching transistors numbering the number of bits of the lower bits, an output of each pair connected to a respective input of a corresponding one of the current dividers, and an input of one transistor of each pair receiving the first current and an input of the other transistor of each pair receiving the second current,
• wherein a corresponding one of the lower bits is applied to the gate terminals of a corresponding pair of the switching transistors, and
• wherein the lower bits are independent of the upper bits and the lower and upper bits number at least one bit.

A column driver comprising:

• a digital-to-analog conversion circuit configured to convert digital data into analog data corresponding to a gray level displayed at a pixel and output the analog data;
• and
• a switching circuit configured to transmit the analog data output from the digital-to-analog conversion circuit to the pixel,
• wherein the digital-to-analog conversion circuit comprises:
• a digital-to-analog converter configured to output two adjacent analog voltages among a plurality of analog voltages based on upper bits of the digital data;
• and
• a buffer amplifier comprising two input terminals, wherein one of the two input terminals receives one of the two adjacent analog voltages and the other one of the two input terminals receives the other one of the two adjacent analog voltages, wherein the buffer amplifier is configured to generate a current offset by controlling a current flowing into each of the two input terminals based on lower bits of the digital data.