US 2010/0141487 A1 · METHOD AND APPARATUS FOR DECODING VARIABLE LENGTH DATA

Abstract

System and method for decompressing data. A compressed data stream including contiguous variable length data blocks is received, each variable length data block including multiple contiguous variable length data fields. A current data block of the contiguous variable length data blocks is stored in one or more registers of a processor. Decoding state information is stored in another register of the processor. A single machine instruction of the processor is loaded. The instruction includes one or more operands corresponding respectively to the one or more registers, and another operand corresponding to the other register, where the other register is further operable as a destination register to store a result of the machine instruction. The instruction is executed to decompress the current data block using the stored decoding state information, including storing the decompressed current data block in the other register. The decompression is repeated for subsequent blocks in the stream.

Claims22

Dependent claims

A method for decompressing data, comprising:

receiving a compressed data stream comprising one or more contiguous variable length data blocks, wherein each variable length data block comprises a plurality of contiguous variable length data fields;
storing a current data block of the one or more contiguous variable length data blocks in one or more registers of a processor;
storing decoding state information in another register of the processor;
loading a single machine instruction of the processor, wherein the single machine instruction comprises one or more operands corresponding respectively to the one or more registers, and another operand corresponding to the other register, wherein the other register is further operable as a destination register to store a result of the machine instruction;
and
executing the single machine instruction to decompress the current data block using the stored decoding state information, including storing the decompressed current data block in the other register.

3 more elements

A processor for decompressing a compressed data stream comprising one or more contiguous variable length data blocks, wherein each variable length data block comprises a plurality of contiguous variable length data fields, the processor comprising:

a plurality of registers, wherein the plurality of registers comprise a set of one or more registers and another register operable to store decoding state information;
and
processor logic, wherein the processor logic is configured with a single machine instruction that comprises one or more operands corresponding respectively to the one or more registers, and another operand corresponding to the other register, wherein the other register is further operable as a destination register to store a result of the machine instruction;
wherein the processor logic is configured to:
store a current data block of the one or more contiguous variable length data blocks in the one or more registers;
store decoding state information in the other register;
execute the single machine instruction to decompress the current data block in the one or more registers using the stored decoding state information, including storing the decompressed current data block in the other register.

4 more elements

Dependencies are inferred from the claim text.

Method and apparatus for decoding variable length data

Life of this patent

Method and apparatus for decoding variable length data

Life of this patent

Abstract

Claims22