Printed circuit board analyzing system, printed circuit board designing assisting system, their methods, and program

A printed circuit board analyzing method comprising:

• a printed circuit board opposed plane pair equivalent circuit input step for inputting information about opposed plane pair equivalent circuits in a printed circuit board, a voltage observation point, an adjacent interference part position, an analysis frequency, and a circuit solver;
• an adjacent interference part equivalent circuit creating step for creating an equivalent circuit of the printed circuit board adjacent interference part input at said printed circuit board opposed plane pair equivalent circuit input step;
• a whole printed circuit board equivalent circuit creating step for creating an equivalent circuit of the whole printed circuit board by coupling the printed circuit board opposed plane pair equivalent circuits input at said printed circuit board opposed plane pair equivalent circuit input step with the adjacent interference part equivalent circuit created at said adjacent interference part equivalent circuit creating step in the adjacent interference part specified at said printed circuit board opposed plane pair equivalent circuit input step;
• a voltage calculating step for calculating a voltage value in the equivalent circuit of the whole printed circuit board created at said whole printed circuit board equivalent circuit creating step using a circuit solver;
• and
• a calculated voltage value displaying step for displaying for each analysis frequency a voltage value corresponding to the voltage observation point input at said printed circuit board opposed plane pair equivalent circuit input step from among the voltage values calculated at said voltage calculating step.

A recording medium in which a printed circuit board analyzing program is recorded, said printed circuit board analyzing program causing an information processing apparatus to execute:

• printed circuit board opposed plane pair equivalent circuit input processing for inputting information about opposed plane pair equivalent circuits in a printed circuit board, a voltage observation point, an adjacent interference part position, an analysis frequency, and a circuit solver;
• adjacent interference part equivalent circuit creating processing for creating an equivalent circuit of the printed circuit board adjacent interference part input by said printed circuit board opposed plane pair equivalent circuit input processing;
• whole printed circuit board equivalent circuit creating processing for creating an equivalent circuit of a whole printed circuit board by coupling the printed circuit board opposed plane pair equivalent circuits input by said printed circuit board opposed plane pair equivalent circuit input processing with the adjacent interference part equivalent circuit created by said adjacent interference part equivalent circuit creating processing in the adjacent interference part specified by said printed circuit board opposed plane pair equivalent circuit input processing;
• voltage calculating processing for calculating a voltage value in the equivalent circuit of the whole printed circuit board created by said whole printed circuit board equivalent circuit creating processing using a circuit solver;
• and
• calculated voltage value displaying processing for displaying for each analysis frequency a voltage value corresponding to the voltage observation point input by said printed circuit board opposed plane pair equivalent circuit input processing from among the voltage values calculated by said voltage calculating processing.

A printed circuit board design supporting system comprising:

• printed circuit board structure information input device for inputting information about positional information for a power supply plane and a ground plane in a printed circuit board;
• mesh defining device for inputting a mesh interval for lattice-point generation required by power-supply-plane/ground-plane extracting device;
• adjacent interference suppressing via interval input device for inputting a via interval for adjacent interference suppressing via positioning display;
• power-supply-plane/ground-plane extracting device for storing a position at which the power supply plane lies and a position at which the ground plane lies in the printed circuit board based on the information input by said mesh defining device;
• adjacent interference part extracting device for extracting a region acting as an adjacent interference part based on the information stored by said power-supply-plane/ground-plane extracting device;
• and
• adjacent interference suppressing via positioning display device for displaying recommended via positioning along the adjacent interference part extracted by said adjacent interference part extracting device and at the via intervals specified by said mesh defining device.

A printed circuit board design supporting method comprising:

• a printed circuit board structure information input step for performing input of printed circuit board structure information, a definition of a mesh, and a specification of an adjacent interference suppressing via interval;
• a power-supply-plane/ground-plane extracting step for extracting positional information for a power supply plane and a ground plane from the printed circuit board structure information input at said printed circuit board structure information input step;
• an adjacent interference part extracting step for performing extraction of an adjacent interference part from the positional information for the power supply plane and ground plane extracted at said power-supply-plane/ground-plane extracting step;
• and
• an adjacent interference part via positioning step for displaying a mark indicating where to position adjacent interference suppressing ground via along the adjacent interference part extracted at said adjacent interference part extracting step while maintaining the via interval input at said printed circuit board structure information input step.

A recording medium in which a printed circuit board design supporting program is recorded, said printed circuit board design supporting program causing an information processing apparatus to execute:

• printed circuit board structure information input processing for performing input of printed circuit board structure information, a definition of a mesh, and a specification of an adjacent interference suppressing via interval;
• power-supply-plane/ground-plane extracting processing for extracting positional information for a power supply plane and a ground plane from the printed circuit board structure information input by said printed circuit board structure information input processing;
• adjacent interference part extracting processing for performing extraction of an adjacent interference part from the positional information for the power supply plane and ground plane extracted by said power-supply-plane/ground-plane extracting processing;
• and
• adjacent interference part via positioning processing for displaying a mark indicating where to position adjacent interference suppressing ground via along the adjacent interference part extracted by said adjacent interference part extracting processing while maintaining the via interval input by said printed circuit board structure information input processing.

A printed circuit board design supporting system comprising:

• analysis evaluative printed circuit board opposed plane pair two-dimensional equivalent circuit input device for inputting information on a two-dimensional equivalent circuit of a part in which plane conductors in the form of a simulative printed circuit board for performing interference analysis evaluation are opposed to each other, a noise source, and a position serving as an observation point;
• analysis evaluative printed circuit board adjacent interference part input device for specifying a position at which adjacent opposed plane pairs in said analysis evaluative printed circuit board equivalent circuit model induce noise interference through an adjacent interference part;
• analysis evaluative printed circuit board adjacent interference part equivalent circuit creating device for creating an equivalent circuit of the adjacent interference part at the position specified by said analysis evaluative printed circuit board adjacent interference part input device;
• analysis evaluative whole printed circuit board equivalent circuit creating device for coupling the equivalent circuit specified by said analysis evaluative printed circuit board opposed plane pair two-dimensional equivalent circuit input device with the equivalent circuit created by said analysis evaluative printed circuit board adjacent interference part equivalent circuit creating device at a position corresponding to that specified by said analysis evaluative printed circuit board adjacent interference part input device;
• circuit solver specifying device for specifying a solver for calculating an equivalent circuit;
• suppressed-interference specifying device for specifying beforehand a desired suppressed interference between a plurality of opposed plane pair equivalent circuit blocks input by said analysis evaluative printed circuit board opposed plane pair two-dimensional equivalent circuit input device;
• interference calculating device for calculating an interference by calculating an equivalent circuit created by said analysis evaluative whole printed circuit board equivalent circuit creating device using the solver specified by said circuit solver specifying device at the analysis frequency specified by said analysis evaluative printed circuit board opposed plane pair two-dimensional equivalent circuit input device, comparing the calculated interference with the suppressed interference specified by said suppressed-interference specifying device, and if the calculated interference is smaller than the suppressed interference specified by said suppressed-interference specifying device, outputting a via interval in said analysis evaluative printed circuit board adjacent interference part to an adjacent interference suppressing via positioning display device, or otherwise, prompting an analysis evaluative printed circuit board adjacent interference part via positioning specifying device to recalculation;
• analysis evaluative printed circuit board adjacent interference part via positioning specifying device for, if the interference calculated by said interference calculating device is greater than the interference specified by said suppressed-interference specifying device, calculating an interval for positioning vias along the analysis evaluative printed circuit board adjacent interference part according to a certain rule, and supplying the information as an input to the analysis evaluative whole printed circuit board equivalent circuit creating device;
• design-supporting printed circuit board structure information input device for inputting information about positional information for a power supply plane and a ground plane in a design-support-target printed circuit board;
• mesh defining device for inputting a mesh interval for lattice-point generation required by a power-supply-plane/ground-plane extracting section for the design-support-target printed circuit board;
• design-supporting printed circuit board power-supply-plane/ground-plane extracting device for storing a position at which the power supply plane lies and a position at which the ground plane lies in the design-support-target printed circuit board based on the information input by said mesh defining device;
• design-supporting printed circuit board adjacent interference part extracting device for extracting, for the design-support-target printed circuit board, a region acting as an adjacent interference part in the design-support-target printed circuit board based on the information stored by said power-supply-plane/ground-plane extracting device;
• and
• design-supporting printed circuit board adjacent interference via positioning display device for displaying vias positioning along the adjacent interference part extracted by said design-supporting printed circuit board adjacent interference part extracting device according to the recommended via positioning interval output by said interference calculating device.

A printed circuit board design supporting method comprising:

• an analysis evaluative printed circuit board information input step for inputting information about analysis evaluative printed circuit board opposed plane pair equivalent circuit information, an analysis evaluative printed circuit board adjacent interference part position, an analysis frequency, a suppressed interference, a circuit solver, a structure of a design-support-target printed circuit board, and a mesh definition;
• an adjacent interference part equivalent circuit creating step for creating an equivalent circuit of the analysis evaluative printed circuit board adjacent interference part specified at said analysis evaluative printed circuit board information input step;
• a whole printed circuit board equivalent circuit creating step for creating an equivalent circuit of the whole analysis evaluative plane circuit board by coupling the analysis evaluative printed circuit board opposed plane pair equivalent circuit input at said analysis evaluative printed circuit board information input step with the analysis evaluative adjacent interference part equivalent circuit created at said adjacent interference part equivalent circuit creating step in the analysis evaluative printed circuit board adjacent interference part specified at said analysis evaluative printed circuit board information input step, and if there exists via positioning specified by an analysis evaluative printed circuit board adjacent interference part via positioning specifying section, creating an equivalent circuit model of the vias at the corresponding positions;
• an interference calculating step for calculating an interference by calculating a voltage value in the equivalent circuit of the whole analysis evaluative printed circuit board created at said whole printed circuit board equivalent circuit creating step using the circuit solver specified at said analysis evaluative printed circuit board information input step;
• an interference comparing step for comparing the interference calculated at said interference calculating step with the suppressed interference specified at said analysis evaluative printed circuit board information input step, and if a case in which the interference calculated at the analysis frequency is greater than the suppressed interference is encountered, going to an adjacent interference part via positioning interval specifying step, or otherwise, going to a design-supporting printed circuit board power-supply-plane/ground-plane positional information extracting step;
• an adjacent interference part via positioning interval specifying step for specifying a positioning interval for vias in the adjacent interference part in the analysis evaluative printed circuit board using a formula with which the interval is decremented for each iteration, and going back to said whole printed circuit board equivalent circuit creating step;
• a design-supporting printed circuit board power-supply-plane/ground-plane positional information extracting step for extracting positional information for a power supply plane and a ground plane in the design-supporting printed circuit board;
• a design-support-target printed circuit board adjacent interference part extracting step for extracting an adjacent interference part in the design-support-target printed circuit board;
• and
• a design-support-target printed circuit board via displaying step for displaying vias along the adjacent interference part in the design-support-target printed circuit board at via positioning intervals specified at said adjacent interference part via positioning interval specifying step.

A recording medium in which a printed circuit board design supporting program is recorded, said printed circuit board design supporting program causing an information processing apparatus to execute:

• analysis evaluative printed circuit board information input processing for inputting information about analysis evaluative printed circuit board opposed plane pair equivalent circuit information, an analysis evaluative printed circuit board adjacent interference part position, an analysis frequency, a suppressed interference, a circuit solver, a structure of a design-support-target printed circuit board, and a mesh definition;
• adjacent interference part equivalent circuit creating processing for creating an equivalent circuit of the analysis evaluative printed circuit board adjacent interference part specified by said analysis evaluative printed circuit board information input processing;
• whole printed circuit board equivalent circuit creating processing for creating an equivalent circuit of the whole analysis evaluative plane circuit board by coupling the analysis evaluative printed circuit board opposed plane pair equivalent circuit input by said analysis evaluative printed circuit board information input processing with the analysis evaluative adjacent interference part equivalent circuit created by said adjacent interference part equivalent circuit creating processing in the analysis evaluative printed circuit board adjacent interference part specified by said analysis evaluative printed circuit board information input processing, and if there exists via positioning specified by an analysis evaluative printed circuit board adjacent interference part via positioning specifying section, creating an equivalent circuit model of the vias at the corresponding positions;
• interference calculating processing for calculating an interference by calculating a voltage value in the equivalent circuit of the whole analysis evaluative printed circuit board created by said whole printed circuit board equivalent circuit creating processing using the circuit solver specified by said analysis evaluative printed-circuit-board information input processing;
• interference comparing processing for comparing the interference calculated by said interference calculating processing with the suppressed interference specified by said analysis evaluative printed circuit board information processing, and if a case in which the interference calculated at the analysis frequency is greater than the suppressed interference is encountered, going to adjacent interference part via positioning interval specifying processing, or otherwise, going to design-supporting printed circuit board power-supply-plane/ground-plane positional information extracting processing;
• adjacent interference part via positioning interval specifying processing for specifying a positioning interval for vias in the adjacent interference part in said analysis evaluative printed circuit board using a formula with which the interval is decremented for each iteration, and going back to said whole printed circuit board equivalent circuit creating processing;
• design-supporting printed circuit board power-supply-plane/ground-plane positional information extracting processing for extracting positional information for a power supply plane and a ground plane in said design-supporting printed circuit board;
• design-support-target printed circuit board adjacent interference part extracting processing for extracting an adjacent interference part in the design-support-target printed circuit board;
• and
• design-support-target printed circuit board via displaying processing for displaying vias along the adjacent interference part in the design-support-target printed circuit board at via positioning intervals specified by said adjacent interference part via positioning interval specifying processing.