System and method for implementing cache sharing
AssigneeHangzhou H3C Technologies Co., Ltd.
InventorZhanming WEI
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Abstract
A system for implementing cache sharing includes a main control unit and a plurality of service processing units, and further includes a shared cache unit respectively connected with the main control unit and the service processing units for implementing high-speed data interaction among the service processing units. A method for cache sharing is also provided. In embodiments of the present invention, based on a reliable high-speed bus, a high-speed shared cache is provided. A mutual exclusion scheme is provided in the shared cache to ensure data consistency, which not only implements high-speed data sharing but also dramatically improves system performance.
Claims13
A system for implementing cache sharing, comprising:
- a main controller, a plurality of service processing units, and a shared cache unit connected with the main control unit and the plurality of service processing units respectively;
- wherein the main controller transfers control information to the plurality of service processing units through a control channel, and the plurality of the service processing units transfer service data between each other through a service channel;
- the main controller and the plurality of the service processing units are respectively configured with memories;
- the shared cache unit is adapted to implement cache sharing and comprises:
- a high-speed interface, respectively connected with the main control unit and the plurality of the service processing units, adapted to receive operation requests on the shared cache unit;
- a high-speed cache, adapted to provide a cache space and store data at a high-speed;
- and
- a cache controller, connected between the high-speed interface and the high-speed cache, adapted to:
- according to the operation requests on the shared cache unit, implement an operation on the high-speed cache to realize the cache sharing.
Dependencies are inferred from the claim text.